optimized reversible programmable logic array (pla)

reversible logic circuits have found emerging attentions in nanotechnology,optical computing, quantum computing and low power design. a programmablelogic array (pla) is a universal circuit which is used to implement combinationallogic circuits. the main part of a pla is its and array. in this study we propose twotypes of optimized reversible programmable logic array (rpla) circuits. the firsttype is based on a “2-to-4” and array, and is proposed for the first time. thesecond type is based on a “3-to-8” and array. for each type, we bring somedifferent designs. these circuits are compared with the existing counterparts interms of number of constant inputs and garbage outputs, delay and the quantum costand are shown that all parameters in proposed circuits are improved.